HIGH-SPEED PCBTransmission line
interactive shared state
01
PROPAGATION

Transmission line & reflections

Explore a signal as it propagates, reflects, and settles at the receiver.

CORE IDEAInterconnect delay matters relative to edge time, not clock frequency alone.
SPATIAL VIEWVoltage along physical channel
forward →← reflectedtotal

Step: 0 → A; other signals: ±A. Random rate is in Mbit/s. Time and voltage scales stay fixed when excitation changes.

Adjust a parameter. The affected geometry or waveform will respond here.
DOMAIN SPACE + TIMEMODEL LOSSLESS TL● RUNNING
TIME DOMAINForward, reflected & receiver voltage
PROBE + LOAD
02
TERMINATION

50 Ω matching & bounce behavior

Matching is about controlling what happens when a traveling wave reaches an impedance discontinuity. The schematic and lattice share the same parameters.

CORE IDEAA 50 Ω trace is not “a 50 Ω resistor.” It is a transmission-line boundary condition.
IMPULSE PATHSTermination network + reflection coefficients

Step: 0 → A; other signals: ±A. Random rate is in Mbit/s. Time and voltage scales stay fixed when excitation changes.

Labels show path gain (V/Vs). Path brightness follows the selected signal; the plot shows total load voltage.
TIME ↓ DOWN · FIRST 8 FLIGHTSCYAN POSITIVERED NEGATIVE
SETTLINGLoad voltage after repeated reflections
PROBE + LOAD
03
DIFFERENTIAL

Differential signals & skew

The pair is useful because equal and opposite fields cancel. Spacing changes field sharing; skew breaks simultaneity and converts differential energy into common mode.

CORE IDEALength matching matters only relative to the signal edge and receiver timing budget.
FIELD + TIMINGComplementary traveling signals
V+V−common mode

Differential Vpp sets the full bipolar swing; step excursion is Vpp/2. Shape and rate are shared.

Move spacing or mismatch. Geometry and edge alignment change together.
Ideal skew model; no even/odd-mode impedance or coupling extraction.
SAMPLE SAME INSTANTPAIR COUPLED● RUNNING
DIFFERENTIAL DOMAINV+, V− and Vdiff
3 TRACE
MODE CONVERSIONCommon-mode voltage
VCM
04
COUPLING

Crosstalk & coupling

The aggressor does not “send noise through air.” Its changing electric and magnetic fields share geometry with the victim. Reference-plane distance and parallelism control that overlap.

CORE IDEASpacing in absolute millimeters is less useful than spacing relative to plane height.
COUPLED REGIONAggressor / victim field interaction
aggressorvictim

Step: 0 → A; other signals: ±A. Random rate is in Mbit/s. Time and voltage scales stay fixed when excitation changes.

Change spacing, plane height, or parallel length. The physical field geometry redraws here.
Lossless modal model; kC/kL are supplied, not extracted from geometry.
COUPLING EDGE-DRIVENREFERENCE PLANE INCLUDED● RUNNING
TIME DOMAINNear-end and far-end crosstalk
SEPARATE NEAR / FAR PORTS
05
RETURN PATH

Via transition & return geometry

A signal via is only half of a transition. The return current also needs a low-inductance path between reference structures. Remove it and the loop area expands.

CORE IDEAEvery signal current has a return current. Route both.
LAYER TRANSITIONSignal current + return-current path
signalreturnfield cue
Move pitch or distance. The fence geometry and return-current loop change immediately.
Geometry only: no calculated leakage, containment, or via S-parameters.
CROSS SECTION L2 → L5FIELD WAVELENGTH CUE● RUNNING
PARAMETRIC SWEEPPitch / wavelength vs fence pitch
GEOMETRIC REFERENCE
06
ELECTROMAGNETIC GEOMETRY

Stackup geometry drives Z₀

Characteristic impedance emerges from field geometry. Width, plane spacing, copper thickness, and dielectric constant all redistribute electric and magnetic energy.

CORE IDEAControlled impedance is a geometry problem before it is a routing rule.
CROSS SECTIONMicrostrip geometry + electric field
Change W, H, T, or εr. Copper, plane position, and field distribution redraw continuously.
Quasi-static Hammerstad–Jensen; no solder mask, dispersion, or loss.
MODEL MICROSTRIPOUTPUT Z₀ + εeff + vp● LINKED
SENSITIVITYZ₀ versus trace width
CURRENT H / εr / T
07
DESIGN REVIEW

Audit the channel you just built

This page does not teach new rules. It evaluates the state created across the other labs and turns the visual experiments into engineering review questions.

WORKFLOWExperiment → observe → quantify → review → simulate → measure.
ROUTING SEQUENCEA practical order of operations
BOARD DESIGN
01StackupLock reference planes and target impedance.
02InterfacesIdentify edge rate, drivers, loads and topology.
03Return pathPlan layer changes and stitching before routing.
04Critical routesRoute clocks, SERDES and differential interfaces.
05Coupling reviewInspect spacing, parallelism and victim sensitivity.
06ValidateIBIS / field solver / TDR / VNA / scope.
SYSTEM VIEWTX → interconnect → coupled region → layer transition → RX
parameters propagate across every lab